A logic circuit that may be considered as a single-pole multiway switch whose output is determined by the position of the switch wiper (see diagram). The wiper position is controlled by a select signal, normally digital, that indicates which of the inputs is to be connected to the output. In this way a number of channels of data may be placed sequentially on a time-shared output bus under the control of the select signal, a process known as time division multiplexing. Inputs to and outputs from a multiplexer may be in digital or analogue form. See also decoder/demultiplexer.

Data selector/multiplexer.