A family of integrated logic circuits in which each input signal comes through a diode and the output is taken from the collector of an inverting transistor (see inverter). The basic circuit is a NAND gate (see diagram). If any of the inputs is at the low logic level the corresponding input diode is forward biased and can conduct current away from the diodes D₁ and D₂. The potential at point X is therefore at a value determined by the diode forward voltage and represents the low logic level. It is insufficient to forward bias D₂ and no current can flow to the base of the transistor. The transistor is therefore ‘off’ and the collector voltage is at the high logic level. If all the inputs are high, all the input diodes are reverse biased and cannot conduct current. The potential at point X is therefore high. Both D₁ and D₂ are forward biased and current flows to the base of the transistor, which turns on and saturates. The collector voltage falls to the low logic level.

The speed of the DTL circuit is slow compared to emitter-coupled logic circuits because the output transistor is operated in the saturated mode: carrier storage at the collector junction causes a delay in the switching time between logic levels. DTL circuits have been largely replaced by transistor-transistor logic circuits.

Diode transistor logic NAND circuit