单词 | vertical metal oxide semiconductor technology |
释义 | vertical metal oxide semiconductor technology [`vǝrd·ǝ·kǝl ¦med´ǝl ¦äk´sīd ¦sem·i·kǝn´dǝk·tǝr tek`näl·ǝ·jē] ELECTRONICS For semiconductor devices, a technology that involves essentially the formation of four diffused layers in silicon and etching of a V-shaped groove to a precisely controlled depth in the layers, followed by deposition of metal over silicon dioxide in the groove to form the gate electrode. Abbreviated VMOS technology. |
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