理学 计算机硬件电路 释 tri-state gate 三态门 一类输出除了高电平、低电平外，还有称为“高阻抗”的第三种状态的逻辑门，经常用于总线接口电路。
计算机硬件 计算机集成电路 释文 tri-state gate 三态门
- laboratory experiment
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- Laboratory Information Management System，LIS
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- Laboratory of the Linear Accelerator
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